SystemC jobs
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| Nov 22 | Sr. Design Verification Engineer | Synergy Seven | Chandler, AZ |
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of PLL, DMAs, DDR controllers . Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards . Self starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity... more |
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| Nov 22 | SR. DESIGN VERIFICATION ENGINEER | Mainz Brady Group | Hillsboro, OR |
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starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity with Transaction Level BFMs . Familiarity with Software Simulators If you are interested in this position,... more |
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| Nov 20 | C Consultant::STLA development/Maintenance | New York, NY | |
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STLA internal proprietary order monitoring systemC, basic DB understanding Infragistics experience in C Bachelors... more |
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| Nov 20 | Design Verification Engineer | Sriven Infosys | Chandler, AZ |
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eration of PLL, DMAs, DDR controllers Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards Self starter, team player Familiarity with SystemC and TLM2.0 Familiarity... more |
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| Nov 19 | Verification Engineer I | SanDisk | Milpitas, CA |
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Development of behavioral models with object oriented language in C++/SystemC. Evaluation and support of digital simulation tools/flows on design methodology. Development of... more |
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| Nov 19 | Senior Design Verification Engineer | Everest Consultants | Chandler, AZ |
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of PLL, DMAs, DDR controllers . Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards . Self starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity... more |
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| Nov 19 | Design Verification Engineer | Sriven Infosys | Chandler, AZ |
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eration of PLL, DMAs, DDR controllers Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards Self starter, team player Familiarity with SystemC and TLM2.0 Familiarity... more |
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| Nov 19 | C#, GUI, .Net Developer | Data Group | Durham, NC |
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opment language C#, .Net and SQLStrong understanding of Fixed Income or Interest Rates Product businessUnderstanding front to back Trading systemC# GUI experience and... more |
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| Nov 19 | C#, GUI, .Net Developer w/ Trading experience | Data Group | Durham, NC |
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businessUnderstanding front to back Trading systemC# GUI experience and .NetMessaging system - E4JMSSQL (Sybase, Oracle or MS)Java or Visual C++Test Case Development Bernard... more |
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| Nov 19 | .NET Architect : C : ASP.NET : Software Architect : C.NET | Brooklyn, NY | |
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OOD, workflow, applicant tracking systemC : ASP.NET : .NET 3.5 : C.NET : .NET Architect : Architect : Software Architect : Senior Software Engineer : Lead Developer : Application... more |
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| Nov 18 | Senior Design Verification Engineer | U.S. Tech Solutions | Chandler, AZ |
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Self starter, team player Familiarity with SystemC and TLM2.0 Familiarity with ... encoders/decoders ,PCIe, DDR3, JPEG, H264, I2C and JTAG standards ,SystemC and... more |
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| Nov 18 | Sr. Design Verification Engineer | Pksoft Technologies | Arizona City, AZ |
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starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity with Transaction Level BFMs . Familiarity with Software Simulators Contact Person and Office address James... more |
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| Nov 18 | Senior Design Verification Engineer | Formalized Design | Phoenix, AZ |
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ders Familiarity with operation of PLL, DMAs, DDR controllers Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards Self starter, team player Familiarity with SystemC... more |
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| Nov 18 | Design Verification Engineer 132428 | Sapphire Technologies | Hillsboro, OR |
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starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity with Transaction Level BFMs . Familiarity with Software SimulatorsSapphire Technologies is an EOE-M/F/V/D... more |
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| Nov 18 | Sr. Verification Designer | Cross Creek Systems | Santa Clara, CA |
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flow Experience with tools - VERA, SystemC, TestBuilder, version control system and bug tracking system EDUCATION: Minimum of Master of Science degree Prefer Electrical... more |
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| Nov 18 | SR. DESIGN VERIFICATION ENGINEER | Pksoft Technologies | Arizona City, AZ |
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ion of PLL, DMAs, DDR controllers. Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards. Self starter, team player. Familiarity with SystemC and TLM2.0. Familiarity... more |
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| Nov 18 | Senior Design Verification Engineer | ASK IT Consulting | Chandler, AZ |
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n of PLL, DMAs, DDR controllers . Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards . Self starter, team player. Familiarity with SystemC and TLM2.0. Familiarity... more |
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| Nov 18 | Sr. Design Verification Engineer | Pksoft Technologies | Spokane, WA |
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of PLL, DMAs, DDR controllers . Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards . Self starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity... more |
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| Nov 18 | Senior Design Verification Engineer | ASK IT Consulting | Chandler, AZ |
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Self starter, team player. Familiarity with SystemC and TLM2.0. Familiarity with Transaction Level BFMs. Familiarity with Software SimulatorsMonty SinghTechnical Recruiter Ask IT... more |
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| Nov 17 | Senior Design Verification Engineer | eTech Resources | Chandler, AZ |
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of PLL, DMAs, DDR controllers . Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards . Self starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity... more |
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| Nov 17 | Design Verification Engineer 132428 | Sapphire | Hillsboro, OR |
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starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity with Transaction Level BFMs . Familiarity with Software Simulators Sapphire Technologies is an EOE-M/F/V/D... more |
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| Nov 17 | Senior Design Verification Engineer | Everest Consultants | Chandler, AZ |
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of PLL, DMAs, DDR controllers . Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards . Self starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity... more |
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| Nov 17 | Emuation Engineer | Intel | Phoenix, AZ |
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design using VHDL/Verilog/SystemVerilog/SystemC, pre-silicon validation/debug at ... with EDA Modeling languages such as SystemC Familiarity with PSL and/or SVA... more |
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| Nov 17 | "Senior Design Verification Engineer" (Preff a Locals) | Okaya | Chandler, AZ |
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coders?Familiarity with operation of PLL, DMAs, DDR controllers?Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards?Familiarity with SystemC and TLM2.0?Familiarity... more |
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| Nov 17 | Verification Design Engineer | Everest Consultants | Chandler, AZ |
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of PLL, DMAs, DDR controllers . Familiarity with PCIe, DDR3, JPEG, H264, I2C and JTAG standards . Self starter, team player . Familiarity with SystemC and TLM2.0 . Familiarity... more |
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| Nov 17 | Sr. Software Simulator Developer | Fusion408 | Santa Clara, CA |
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have solid C++ & C skills -Experience with SystemC is desired -Possessing both Linux &Windows development experience is preferable -Must be knowledgeable of assembly language... more |
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| Nov 16 | Verification Engineer I | SanDisk | Milpitas, CA |
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Development of behavioral models with object oriented language in C++/SystemC. Evaluation and support of digital simulation tools/flows on design methodology. Development of... more |
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| Nov 16 | Sr. Software Simulator Developer | Fusion408 | Mountain View, CA |
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have solid C++ & C skills -Experience with SystemC is desired -Possessing both Linux &Windows development experience is preferable -Must be knowledgeable of assembly language... more |
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| Nov 16 | Embedded Software Engineer | Aerotek Contract Engineering | Chandler, AZ |
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Bonus Skills: ARM SW development experience SystemC or other modeling experience Python wxWidgets Join Aerotek CE(SM), one of the leading providers of engineering and engineering... more |
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| Nov 16 | Embedded Software Engineer | Aerotek Contract Engineering | Chandler, AZ |
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Bonus Skills: ARM SW development experience SystemC or other modeling experience Python wxWidgets Join Aerotek CE(SM), one of the leading providers of engineering and engineering... more |
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| Nov 16 | Embedded Software Engineer | Aerotek | Chandler, AZ |
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Bonus Skills: ARM SW development experience SystemC or other modeling experience Python wxWidgets Join Aerotek CE(SM), one of the leading providers of engineering and engineering... more |
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| Nov 14 | ASIC Design and Verification Engineer, Senior | Silicon Image | Sunnyvale, CA |
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using high level behavioral modeling in SystemC and Verilog - Verifies RTL logic ... system level modeling using Verilog and/or SystemC - Good communication skill, be... more |
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| Nov 14 | ASIC Verification Engineer - Acceleration | Broadcom | Santa Clara, CA |
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with Verilog Expertise with C/C++ (SystemC a plus) Expertise with major industry RTL simulator Experience with large SOC design verification FPGA/hardware accelerator experience... more |
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| Nov 14 | Associate Applications Engineer - High Level Verification | Mentor Graphics | Wilsonville, OR |
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(VHDL, Verilog, System Verilog, SystemC, constrained random, assertions). * C++ and OOP experience required. * Group or customer presentation skills are required, excellent... more |
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| Nov 14 | Sr. Software Simulator Developer | MIPS Technologies | Sunnyvale, CA |
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devices for the simulators in C, C++ and SystemC. You will be working closely with ... desired. Must have strong C and C++ skill. SystemC experience desired. Having both... more |
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| Nov 13 | Associate Applications Engineer - High Level Verification | Mentor Graphics | Wilsonville, OR |
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(VHDL, Verilog, System Verilog, SystemC, constrained random, assertions). * ... High Level Verification, VHDL, Verliog, SystemC, constrained random assertions, C++,... more |
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| Nov 13 | Algorithm Software Engineer | Marseille Networks | Santa Clara, CA |
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* Linux device driver experience * SystemC Please no phone calls. All resumes that are not sent to the email below will not be reviewed. Apply to hr@marseillenetworks.com MS or... more |
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| Nov 13 | VLSI Design Engineer, ASIC Design | Marseille Networks | Santa Clara, CA |
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SystemVerilog and/or SystemC 4. Modeling of complex digital functions in C or C++ 5. Video systems such as digital television 6. Communications systems Educational Requirements... more |
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| Nov 13 | ASIC Verification Engineer - Acceleration | Broadcom | Santa Clara, CA |
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and 5+ years of work experience in the field of design verificationExpertise with Perl, Linux/UNIX Expertise with Verilog Expertise with C/C++ (SystemC a plus) Expertise with... more |
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| Nov 13 | ASIC Verification Engineer - Acceleration | Broadcom | Santa Clara, CA |
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with Verilog Expertise with C/C++ (SystemC a plus) Expertise with major industry RTL simulator Experience with large SOC design verification FPGA/hardware accelerator experience... more |
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