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Oct 08 Electronic System-Level (ESL) Modeler (SystemC, SoC) HCL America Hillsboro, OR

(as many) Hardware modelling using (SystemC, C++, DML, TLM Standards, HDL) OSCI, ... and verifiable professional experience. systemc c c++ esl tlm microprocessor... more

More Job Postings from the Web
Oct 30 Validation Solutions Developer (TMG/DTS) Hillsboro, OR

based S/W development enviroment and tools, SystemC and ESL, HW design and Verification included CAD tools & flows. Working knowledge of high-speed interconnect or memory... more

Oct 30 Lead Member Technical Staff Mentor Graphics Indiana

2-6 years, preferably in implementing bus protocol BFMs or similar. Knowledge of C/C++ and exposure to verification environments (SV OVM, SystemC, Vera) is a plus. Knowledge of... more

Oct 29 Validation Solutions Developer (TMG/DTS) Intel Oregon

based S/W development enviroment and tools, SystemC and ESL, HW design and Verification included CAD tools & flows. Working knowledge of high-speed interconnect or memory... more

Oct 28 Principal Communications Systems Engineer Kelly Services Irvine, CA

algorithmsMatlab and C / C++ expertise, SystemC expertise a plusExpertise on complexity aware, efficient, low power system design techniques is a strong plusStrong analytical... more

Oct 28 Architecture & Systems Graduate Researcher ARM Austin, TX

of developing transaction-level models in SystemC or similar discrete event simulation frameworks * Strong programming skills using C++, object oriented software design and... more

Oct 27 Architecture & Systems Graduate Researcher Artisan Austin, TX

of developing transaction-level models in SystemC or similar discrete event simulation frameworks * Strong programming skills using C++, object oriented software design and... more

Oct 27 Design Verification and Methodology Deployment Engineer Encore Semi San Diego, CA

languages: C, C++, and SystemC. • Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired. • Scripting and... more

Oct 27 Sr. IC Design Engineer (WiFi/DSP) Broadcom Sunnyvale, CA

ldpc concepts, etc. - Knowledge of systemC,C/C++, HLS, Perl, TCL or other scripting languages is desired Country US State/Province CA City/Town Sunnyvale Shift 1st Shift - Day... more

Oct 27 Architecture & Systems Graduate Researcher Middlesex Community College Austin, TX

of developing transaction-level models in SystemC or similar discrete event simulation frameworks * Strong programming skills using C++, object oriented software design and... more

Oct 21 ASIC Verification Engineer Results Center Santa Clara, CA

Verilog, VCS/NCsim, Modeltech, C-language or SystemC, Vera, Specman, System Verilog. Candidate must show a strong knowledge in the development of chip verification environments... more

Oct 21 ASIC Verification Engineer Marvell Santa Clara, CA

Verilog, VCS/NCsim, Modeltech, C-language or SystemC, Vera, Specman, System Verilog. Candidate must show a strong knowledge in the development of chip verification environments... more

Oct 20 Embedded Systems Engineer, Senior Altera San Jose, CA

virtual platforms, and emulators, e.g. QEMU, SystemC, etc. Familiarity with software engineering tools, such as UML, requirements management, test frameworks. Scripting skills,... more

Oct 19 Computer Architect / Computer Engineer Job Leidos San Diego, CA

4+ years of experience with Verilog, VHDL, SystemC, and/or SystemVerilog for the ... •Platform exploration (SystemC/TLM) for custom SoC using industry standard tools... more

Oct 17 Embedded Systems Engineer.. UTC Aerospace Systems Windsor Locks, CT

and analysis using languages such as SystemC or UML, software requirements modeling and simulation-based verification, HIL and SIL verification testing, network performance... more

Oct 14 Digital Verification Engineer Cyient Raleigh, NC

+ of experience in OVM or UVM (or at least VMM), verification (systemverilog, ovm/uvm/vmm, random testbench), programming (oop, c/c++, systemc, perl), rtl design (verilog or... more

Oct 13 Analog EDA Application Engineer Texas Instrutments Dallas, TX

MATLAB, Verilog, Verilog-A,, Verilog-AMS, VHDL, VHDL-AMS and/or SystemC). * Ability to setup and debug analog and mixed-signal simulations and analyze data in Analog Artist is... more

Oct 13 Advanced Memory Systems RTL Lead Engineer Job Micron Boise, ID

Compiler, PrimeTime, IC Compiler, etc.), SystemC. Education: A BS in Electrical or Computer Engineering or similar and 5+ years of logic/system design experience including ASIC... more

Oct 13 Sr Memberand MTS Eda Careers California

abstract specifications written in C++/SystemC and their corresponding RTL implementations. In this role, you will be directly contributing to leading edge software development... more

Oct 08 Pre- Silicon Verification-(252689) Compnova Santa Clara, CA

• Expertise in c/c++ and systemC. Knowledge of Specman/e a plus. • Knowledge of emulation and writing testbenches for emulation a plus. Excellent communication and team work... more

Oct 08 ASIC Design Engineer Arbor - Danaher Beaverton, OR

OVM) Experience modeling HW using C++/SystemC and HW/SW co-simulation techniques Demonstrated analytic and problem solving skills Ability to work in large multi-site teams Strong... more

Oct 08 Instant Closure Need Pre-Silicon Engineer @ Simplion Technologies Milpitas, CA

PCIe, USB, SATA, MIPI etc ) or Memory Interfaces ( Flash, DDR, SDIO etc ) or SoC infrastructure blocks ( Bus Infrastructure, DMA etc ). Experience in emulation / systemc is a... more

Oct 06 Principal EDA Software Engineer- Formal Verification CAE Recruiters San Jose, CA

abstract specifications written in C++/SystemC and their corresponding RTL implementations and contributing to leading edge software development for this tool. This will involve... more

Oct 06 Staff Software Development Engineer - Modeling/Simulator Design Fusion408 Santa Clara, CA

* Create software model/simulator (in C++/C/SystemC) of ICs that we develop to enable ... Oriented programming abilities in C++ or SystemC. * Solid history with knowledge of IC... more

Oct 03 Engineer - Drive Architecture Hardware Systems - Entry Level Seagate Minnesota

modeling tools like Hyperformix Workbench, SystemC, and iSight. Internship in a related industry. Familiarity with Six Sigma, Design for Six Sigma, and Design for Reliability. HR... more

Sep 28 Staff R&D Simulation Tools Engineer Synopsys Sunnyvale, CA

new features for the transaction level SystemC models as well as cycle accurate ... SystemC 2.x, OSCI SystemC, TLM 2.0 API standards a plus · Expert-level programming... more

Sep 16 Patient Care Assistant St. Luke's University Health Network Coaldale, PA

orders using order entry computer systemc) Maintains sufficient unit suppliesd) Maintains unit statistics, manuals and logs as assignede) Communicates between members of the... more

Sep 12 Sr Verification Engineer Job SanDisk Milpitas, CA

include: Developing behavioral models in SystemC and C++ and methodology development for logic verification. RTL and Gate level simulation/verification. Support of assertions and... more

Sep 11 Intern: ASIC Engineer Juniper Networks Sunnyvale, CA

or Computer Science * Strong Verilog, SystemC or C/C++, Perl/shell skills. * Must have good leadership and communication skills. * Networking experience is highly desirable, but... more

Sep 05 Intern – ASIC HW Engineer InterDigital King of Prussia, PA

methodology including RTL (VHDL, Verilog, SystemC), simulation, synthesis, etc. Job ... including RTL (VHDL, Verilog, SystemC), simulation, synthesis, etc. · Pragmatic... more

Aug 31 Product Engineering SW Architect - Semi and System Software Wipro Technologies Portland, OR

Embedded SW, C++, SystemC/ TLM2/ Perl/ Python/ Basic Architecture concepts, SW processes?Basic ISA modeling / IP Modeling / Writing Tests / AutomationSOC Modeling ( Func / Cycle... more

Aug 04 Design Modeling Engineer Calsoftlabs-an Alten Group Company San Diego, CA

for implementing and supporting C++ and SystemC functional modelsfor the Digital ... -Design and verification environment at SystemC level -HW/SW co-verification -HLS... more

Aug 04 Engineer Circuit Design 3(14015703) Northrop Grumman Manhattan Beach, CA

and modeling using C/C++, SystemVerilog, or SystemC. Northrop Grumman Corporation is a leading global security company providing innovative systems, products, and solutions in... more

Jul 08 Design Verification Engineer Amd | Seamicro Sunnyvale, CA

functional modeling using C++ and SystemC preferred • Familiarity with System Verilog and OVM/UVM preferred • Experience with build tools including make, version control, Perl, or... more

Jun 09 Senior Principal Analog Design Engineer Terran Systems San Jose, CA

with analog behavioral modeling a plus (SystemC, System Verilog, Matlab) ? Self driven, results -oriented individual capabile of working well with a very experienced and proven... more

May 12 ASSOCIATE ASIC/FPGA Verification Engineer L-3 Camden, NJ

proficiency in C/C++, VHDL. Proficiency with SystemC, System Verilog a big plus. Knowledge of UVM desired but not required. Knowledge of high-speed peripheral interfaces... more

Apr 25 Sr Application Engineer Cadence Design Systems San Jose, CA

with a mix of SystemVerilog, SystemC/C/C++, Verilog & VHDL using industry ... SystemVerilog, VHDL, Verilog, C/C++, SystemC * Experience with debug of UVM * Ability to... more

Apr 23 Lead Engineer Mentor Graphics Incorporation Indiana

sure to ARM assembly language, ARM processor architecture, ARM Fast Models, QEMU are a plus. Exposure to Verilog/VHDL/System Verilog, SystemC and functional verification tools... more

Apr 18 Design Verification Engineer AMD Sunnyvale, CA

functional modeling using C++ and SystemC preferred • Familiarity with System Verilog and OVM/UVM preferred • Experience with build tools including make, version control, LSF,... more

Mar 10 Sr. Engineer, ASIC Design/Verification Sustainable Recruitment Concepts San Jose, CA

ec standards such as H.264, MPEG-2 or VP8 Knowledge of new H.265/HEVC standard a big plus Language: Verilog/VHDL, SystemVerilog, C/C++/SystemC, Scripting language Tools:... more

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