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Oct 01 FPGA Engineer/Developer, Verilog, Asic, SystemVerilog, Finance Hunter Bond Chicago, IL

FPGA Engineer, Verilog, Asic, SystemVerilog Prestigious Global Trading Firm is currently ... of hardware architecture Verilog (SystemVerilog is a plus) Full development... more

Sep 26 FPGA Engineer/Developer, Verilog, Asic, SystemVerilog, Finance, $200,0 Hunter Bond Chicago, IL

FPGA Engineer, Verilog, Asic, SystemVerilog Prestigious Global Trading Firm is currently ... of hardware architecture Verilog (SystemVerilog is a plus) Full development... more

More Job Postings from the Web
Oct 01 FPGA Development Engineer MIT Lincoln Laboratory Lexington, MA

Experience with VHDL, Verilog, and SystemVerilog, code development for design, test, and verification of FPGA devices. As well as familiarity with "best practices" coding styles... more

Oct 01 FPGA Engineer Request Technology-craig Johnson Chicago, IL

of hardware architecture Verilog (SystemVerilog is a plus) Experience of full development cycle of FPGA design Experience in verification and testing Should be comfortable... more

Oct 01 Junior FPGA Engineer Next Step Systems Chicago, IL

of hardware architecture -Verilog (SystemVerilog is a plus) -Experience of full development cycle of FPGA design -Experience in verification and testing -Should be comfortable... more

Oct 01 Junior FPGA Engineer (MS100105) Parallel Partners Chicago, IL

of hardware architecture -Verilog (SystemVerilog is a plus) -Experience of full development cycle of FPGA design -Experience in verification and testing -Should be comfortable... more

Sep 30 Verification Design Automation Engineer Collabera San Diego, CA

Verification Languages (OO-HVLs) such as SystemVerilog or VERA, as well as industry standard hardware description languages (HDLs) like Verilog/VHDL Experience in industry... more

Sep 30 Principal Verification Engineer (SystemVerilog / UVM) Broadcom Sunnyvale, CA

Title Principal Verification Engineer (SystemVerilog / UVM)* Business Unit Broadband ... experience (VHDL/Verilog/SystemVerilog) and/or very strong OO programming experience... more

Sep 26 FPGA Engineer/Developer, Verilog, Asic, SystemVerilog, Finance, $200,000 Chicago, IL

Hunter Bond FPGA Engineer, Verilog, Asic, SystemVerilog Prestigious Global Trading Firm ... of hardware architecture * Verilog (SystemVerilog is a plus) * Full development... more

Sep 26 MicroProcessor Verification - Pre Silicon Computer Task Group Austin, TX

programming using languages such as C++ and SystemVerilog. * Experience in scripting languages such as Perl. * Working knowledge of hardware description language (HDL) (VHDL or... more

Sep 26 FPGA Engineer/Developer, Verilog, Asic, SystemVerilog, Finance, $200,000 Hunter Bond Chicago, IL

FPGA Engineer, Verilog, Asic, SystemVerilog Prestigious Global Trading Firm is currently ... of hardware architecture Verilog (SystemVerilog is a plus) Full development... more

Sep 25 FPGA Development Engineer Lincoln Laboratory, Massachusetts Institute of Technology Massachusetts

Experience with VHDL, Verilog, and SystemVerilog, code development for design, test, and verification of FPGA devices. As well as familiarity with "best practices" coding styles... more

Sep 24 FPGA Verification Contractor Fidus Systems San Jose, CA

Specifically, you have strong knowledge in: SystemVerilog Verilog and VHDL Hardware Description language Modelsim/Questa Simulation tools Xilinx ISE Tools Xilinx Spartan6 family... more

Sep 21 Jr. FPGA Engineer Financial Services Institution - Finance Industry Chicago, IL

of hardware architecture Verilog (SystemVerilog is a plus) Experience of full development cycle of FPGA design Experience in verification and testing Should be comfortable... more

Sep 17 Engineer, Verification Design Results Center Santa Clara, CA

h knowledge of advanced verification flow (constrained random, assertion, functional coverage, code coverage) •Familiarity with SystemVerilog/UVM/formal verification/emulation is... more

Sep 17 Postdoctoral Scholar Pennsylvania State University Pennsylvania

C/C++/C#/Java; Python; ROS; Verilog or SystemVerilog; VHDL; Open CV and Open CL; and Linux. Candidate selected may be subject to a government security investigation. This is a one... more

Sep 12 Sr Verification Engineer Job SanDisk Milpitas, CA

of assertions and testbench development in SystemVerilog and UVM. Support of full-chip verification, including digital circuits. This position requires a Bachelors degree in... more

Sep 11 FPGA Engineer Job Leidos Columbia, MD

• 2 years of experiences with Verilog (Systemverilog for verification) hardware ... language (including Systemverilog with OVM/UVM) Leidos Overview:Leidos is an applied... more

Sep 10 Design Verification Engineer (NCG) Altera San Jose, CA

top and IP level design/verification using SystemVerilog/UVM. You are expected to generate UVM/SV code to match design behavior. Other new methods of verification will also be... more

Sep 09 Digital Design and Verification Engineer Linear Technology Colorado Springs, CO

areas: • RTL design in Verilog and SystemVerilog. • Architecture specification including familiarity with microprocessor and SoC architectures. • Validation of software and... more

Sep 09 Design Verification Engineer Asquare.com San Jose, CA

on working experience in verification with SystemVerilog 5 years experience with UVM Experience with requirements tracing US Citizenship Contact (408) 203-6828 verification design... more

Sep 04 Jr. Hardware Engineer Eagle Technical Staffing Chicago, IL

of hardware architecture Verilog (SystemVerilog is a plus) Experience of full development cycle of FPGA design Experience in verification and testing Should be comfortable... more

Sep 03 ASIC Design Engineer Footbridge - IT Division Westford, MA

• Experience in ASIC verification using SystemVerilog • Strong problem solving and ASIC debugging skills • Experience in Constrained-random verification is a strong plus •... more

Sep 03 Staff Digital Design Engineer Silicon Laboratories Austin, TX

Skills, and Abilities: Verilog and SystemVerilog RTL and behavioral modeling skills. Working knowledge of a logic synthesis tool such as Synopsys Design Compiler or Cadence RTL... more

Sep 03 ASIC Verification Engineer - Boise, Idaho Job Micron Longmont, CO

developing Re-Usable Test Benches in SystemVerilog - Additional Skills: - Knowledge of SAS/SATA protocols. It has been and will continue to be the policy of Micron to administer... more

Aug 22 Digital Design Verification Engineer Texas Instrutments Dallas, TX

and flow. * Develop Verification plans, SystemVerilog testscases and verification ... using advanced verification methodologies in SystemVerilog. * Drive new and improved... more

Aug 21 Senior Digital Design Engineer Marvell Technology Group Santa Clara, CA

esign, integration and verification of ARM based wireless networking devices. • Design and verify at module, cluster and top level Verilog/SystemVerilog • Participate in FPGA... more

Aug 11 Lead Digital Hardware and FPGA Engineer Mitre Massachusetts

languages such as VHDL, Verilog, or SystemVerilog. This position provides an exciting opportunity to lead the development and design of state of the art electronic... more

Aug 05 Design Verification Engineer Mindlance San Jose, CA

ASIC design flows Working experience with SystemVerilog and/or UVM Knowledge of wireless communication and good grasp of DSP fundamentals is desirable. **Education:** Preferred:... more

Jul 29 Jr. FPGA Engineer Talent Rif Chicago, IL

of hardware architecture Verilog (SystemVerilog is a plus) Experience of full development cycle of FPGA design Experience in verification and testing Should be comfortable... more

Jul 25 Design Verification Engineer Cirrus Logic Austin, TX

SystemVerilog/OVM, UVM, AVM, Vera, e) required. The candidate must have solid scripting skills with Matlab, Perl, Unix/Linux shell, TCL, and must be able to write and debug analog... more

Jul 22 WLAN PHY Digital Design Verification Enginee Huntech Consultants Massachusetts

testbench and reference model code in SystemVerilog, C, and Matlab in a UVM ... digital ASIC verification tests in SystemVerilog and other verification... more

Jul 14 IC Design Engineer Avago Technologies Colorado Springs, CO

roles.• Fluent in Verilog, C/C++ and SystemVerilog languages.• Fluent in use of Synopsys VCS and Cadence NC-Sim simulators.• Familiar with Design Compiler, PrimeTime, Formality,... more

Jul 09 Sr. Digital Design Engineer Intel Illinois

Desired skills/tools: - DPI-C, SystemVerilog, UVM - VCS, Verdi, Spyglass - ASIC synthesis, formal verification, gate level simulation, static timing analysis, and/or power... more

May 30 Engineer, Senior Verification Design Marvell Santa Clara, CA

environments, preferably using SystemVerilog (UVM, OVM, VMM). - Proficient in C programming as well as some scripting skills. - Knowing NAND flash memory and high speed serial... more

May 14 Lead Mixed-Signal Pre-Silicon Functional Verification Engineer (E1922125) QUALCOMM San Diego, CA

Functional Verification, OVM, UVM, SystemVerilog, Audio, CODEC, Digital, Mixed-signal, Analog, Lead You will need to login into your profile to apply for this job. If you are... more

Apr 28 Digital Verification -- SystemVerilog Functional Coverage Implementation Artech Information Systems Austin, TX

Job Title: Digital Verification - SystemVerilog Functional Coverage Implementation ... implementing, debugging, and closing SystemVerilog functional coverage groups. more

Mar 24 Video Codec Design Engineer Google Mountain View, CA

at the Register Transfer Level (RTL) using SystemVerilog as well as synthesis and timing closure of digital designs. * Scripting capability in languages such as perl or python as... more

Jan 07 Senior Verification Engineer Aba Search San Jose, CA

experience in verification using OVM/UVM/SystemVerilog o Advanced verification methodologies using constrained random, assertion based verification o Experience in putting... more

Oct 22 Design Verification Engineer Verilab Austin, TX

Significant project-based experience using SystemVerilog, Specman/e, SystemC or Vera Project-based experience using UVM, OVM, AVM, VMM, and/or eRM BS/MS/PhD in Engineering or... more

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